From edf5f145013aa28ffbc7f19f874cd489a92f8449 Mon Sep 17 00:00:00 2001
From: rodri <rgl@antares-labs.eu>
Date: Sat, 5 Jun 2021 11:10:23 +0000
Subject: public release.

---
 asm/blinkdelay2/link.ld | 56 +++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 56 insertions(+)
 create mode 100644 asm/blinkdelay2/link.ld

(limited to 'asm/blinkdelay2/link.ld')

diff --git a/asm/blinkdelay2/link.ld b/asm/blinkdelay2/link.ld
new file mode 100644
index 0000000..671a3c6
--- /dev/null
+++ b/asm/blinkdelay2/link.ld
@@ -0,0 +1,56 @@
+OUTPUT_FORMAT("elf32-avr","elf32-avr","elf32-avr")
+OUTPUT_ARCH(avr:5)
+MEMORY
+{
+	text		(rx)   : ORIGIN = 0, LENGTH = 128K
+	data		(rw!x) : ORIGIN = 0x800060, LENGTH = 64K /* 0xffa0? */
+	eeprom		(rw!x) : ORIGIN = 0x810000, LENGTH = 64K
+	fuse		(rw!x) : ORIGIN = 0x820000, LENGTH = 1K
+	lock		(rw!x) : ORIGIN = 0x830000, LENGTH = 1K
+	signature	(rw!x) : ORIGIN = 0x840000, LENGTH = 1K
+	user_signatures	(rw!x) : ORIGIN = 0x850000, LENGTH = 1K
+}
+SECTIONS
+{
+	.text :
+	{
+		*(.vectors)
+		KEEP(*(.vectors))
+		*(.start)
+		*(.text)
+		_etext = .;
+	} >text
+	.data :
+	{
+		*(.data)
+		. = ALIGN(2);
+		_edata = . ;
+	} >data AT>text
+	.bss ADDR(.data) + SIZEOF (.data) : AT (ADDR (.bss))
+	{
+		*(.bss)
+		*(.bss*)
+		*(COMMON)
+		. = ALIGN(2);
+	} >data
+	.eeprom :
+	{
+		KEEP(*(.eeprom*))
+	} >eeprom
+	.fuse :
+	{
+		KEEP(*(.fuse))
+		KEEP(*(.lfuse))
+		KEEP(*(.hfuse))
+		KEEP(*(.efuse))
+	} >fuse
+	.lock :
+	{
+		KEEP(*(.lock*))
+	} >lock
+	.signature :
+	{
+		KEEP(*(.signature*))
+	} >signature
+	_end = .;
+}
-- 
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