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author | rodri <rgl@antares-labs.eu> | 2023-11-24 15:39:06 +0000 |
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committer | rodri <rgl@antares-labs.eu> | 2023-11-24 15:39:06 +0000 |
commit | d850c3b7f47e58556c160f9d03ea20aa52452020 (patch) | |
tree | 20471edd63ca1c23349a1c8e340155fabedf5b27 /dppd.s | |
parent | 9404d16a4263a87559af64bfb18c91ccebaa601d (diff) | |
download | amd64-simd-d850c3b7f47e58556c160f9d03ea20aa52452020.tar.gz amd64-simd-d850c3b7f47e58556c160f9d03ea20aa52452020.tar.bz2 amd64-simd-d850c3b7f47e58556c160f9d03ea20aa52452020.zip |
add more avx instructions and a bench9 benchmark file.
Diffstat (limited to 'dppd.s')
-rw-r--r-- | dppd.s | 17 |
1 files changed, 17 insertions, 0 deletions
@@ -12,6 +12,13 @@ TEXT dppd(SB), 1, $0 DPPD(rX1, rX0) /* DPPD $0x31, X1, X0 */ RET +TEXT dppda(SB), 1, $0 + MOVQ SP, AX + VMOVUPD_128mr(8, rAX, rX0) /* VMOVUPD a+0(FP), X0 */ + VMOVUPD_128mr(32, rAX, rX1) /* VMOVUPD b+24(FP), X1 */ + VDPPD(rX1, rX0, rX0) /* VDPPD $0x31, X1, X0, X0 */ + RET + TEXT dppd3(SB), 1, $0 MOVQ SP, AX MOVLPD(8, rAX, rX0) /* MOVLPD a+0(FP), X0 */ @@ -25,6 +32,16 @@ TEXT dppd3(SB), 1, $0 DPPD(rX1, rX0) /* DPPD $0x31, X1, X0 */ RET +TEXT dppd3a(SB), 1, $0 + MOVQ SP, AX + VMOVUPD_128mr(8, rAX, rX0) /* VMOVUPD a+0(FP), X0 */ + VMOVUPD_128mr(40, rAX, rX1) /* VMOVUPD b+32(FP), X1 */ + VDPPD(rX1, rX0, rX0) /* VDPPD $0x31, X1, X0, X0 */ + MOVSD a+16(FP), X1 + MOVSD b+48(FP), X2 + VFMADD231SD(rX1, rX2, rX0) + RET + TEXT Pt2b(SB), 1, $0 MOVQ BP, DI MOVSD x+8(FP), X0 |