public release.HEADmaster

4 files changed, 63 insertions, 0 deletions

diff --git a/asm/blinkdelay/avrdasm b/asm/blinkdelay/avrdasm
new file mode 100755
index 0000000..ea0707b
--- /dev/null
+++ b/asm/blinkdelay/avrdasm
@@ -0,0 +1,2 @@
+#!/bin/sh
+avr-objdump -D *.elf
diff --git a/asm/blinkdelay/blink.s b/asm/blinkdelay/blink.s
new file mode 100644
index 0000000..30219b1
--- /dev/null
+++ b/asm/blinkdelay/blink.s
@@ -0,0 +1,24 @@
+.include "dat.h"
+
+.globl main
+main:
+	ldi r16, 1<<DDRB5
+	ldi r17, 0<<PORTB5
+	out DDRB, r16
+	out PORTB, r17
+loop:
+	/* delay loop */
+	ldi r18, 82
+	ldi r19, 43
+	ldi r20, 0
+l1:
+	dec r20
+	brne l1
+	dec r19
+	brne l1
+	dec r18
+	brne l1
+	in r16, PORTB
+	com r16
+	out PORTB, r16
+	rjmp loop
diff --git a/asm/blinkdelay/dat.h b/asm/blinkdelay/dat.h
new file mode 100644
index 0000000..d3783b6
--- /dev/null
+++ b/asm/blinkdelay/dat.h
@@ -0,0 +1,20 @@
+/* Data Registers */
+.equ PORTB,	0x05
+.equ PORTB0,	0
+.equ PORTB1,	1
+.equ PORTB2,	2
+.equ PORTB3,	3
+.equ PORTB4,	4
+.equ PORTB5,	5
+.equ PORTB6,	6
+.equ PORTB7,	7
+/* Data Direction Registers */
+.equ DDRB,	0x04
+.equ DDRB0,	0
+.equ DDRB1,	1
+.equ DDRB2,	2
+.equ DDRB3,	3
+.equ DDRB4,	4
+.equ DDRB5,	5
+.equ DDRB6,	6
+.equ DDRB7,	7
diff --git a/asm/blinkdelay/makefile b/asm/blinkdelay/makefile
new file mode 100644
index 0000000..4ad8b12
--- /dev/null
+++ b/asm/blinkdelay/makefile
@@ -0,0 +1,17 @@
+CC=avr-gcc
+AS=avr-as
+
+PORT=/dev/ttyACM0
+TARG=blink
+
+all: build
+
+build:
+	$(CC) -mmcu=atmega328p -o $(TARG).elf $(TARG).s
+	avr-objcopy -j .text -j .data -O ihex $(TARG).elf $(TARG).hex
+
+burn:
+	avrdude -v -p atmega328p -c arduino -P $(PORT) -b 115200 -D -U flash:w:$(TARG).hex
+
+clean:
+	rm -f $(TARG).elf $(TARG).hex